Theres an article on Anand tech that say that AMD will be releasing the revision E of the Athlon64. These new revisions of the A64 will have added SSE3 intruction set that comes with Prescott and should help with media ijntensive tasks that have been ntly the P4s area of strength. The new revision was on the roadmap as San Diego for the FX and Venice for standard. Internally, AMD's San Diego and Venice CPUs are referred to as nothing more than Athlon 64 Revision E chips. Revision E includes even more bug fixes and performance improvements over those we found in Revision D, including support for the 13 new instructions that were added with Prescott, more commonly known as SSE3. It will also have a new and improved memory controller and may increase the memory bandwidth. The performance enhancements that go along with Revision E chips include some optimizations to the Athlon 64's memory controller. The more optimized memory controller improves bandwidth efficiency with regards to unified graphics memory accesses; given that the only type of graphics that uses system memory (and thus the on-die memory controller) is integrated graphics, it's safe to say that the Rev E chips will offer better integrated graphics performance. The next chips that will be revision E are the 4200+ and the FX-57. They're due out somewhere 2H or 2005. My guess is this new revision will go head to head with the LGA-775 1066mhz fsb P4s, which the next one will be the 3.73Ghz EEs for a long while. The full article is here.
